Digital Design Engineer @ Meta

Reality Labs (RL) focuses on delivering Meta's vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms.We are growing our Machine Learning ASIC Design and µArchitecture team within RL and are seeking engineers at all levels who will work with a world-class group of researchers and engineers using your digital design skills to implement and contribute to the development and optimization of low power machine learning accelerators and state-of-the-art SoCs.Digital Design Engineer ResponsibilitiesContribute to ASIC digital µArchitecture and design for low-power machine learning hardware acceleratorAssist performance/power analysis of the design and help meet the power and performance targetsWork with architects to map Machine learning algorithms on the hardwareSupport hand-off and integration of blocks into larger SOC environmentsWork across disciplines, brainstorm big ideas, build new methodologiesMinimum QualificationsBachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience6+ years of experience as a Hardware Design Engineer for production silicon shipped in volumeExperience in digital design µArchitecture, RTL codingExperience in Machine Learning IPs Silicon developmentExperience with at least 1 procedural programming language (C, C++, Python etc.)Preferred QualificationsExperience in SoC integration and ASIC architectureKnowledge of Physical Design and Low power implementationExperience with Machine learning models, algorithms or accelerator architecture For those who live in or expect to work from California…

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