[Remote] ASIC Design Engineer (Intermediate to Senior Level) – AI Accelerator Hardware Lead (Remote)
Note: The job is a remote job and is open to candidates in USA. DD-AIM is a fast-moving startup developing a novel AI accelerator architecture designed for real-time, high-efficiency machine learning workloads. They are seeking an intermediate to senior ASIC Design Engineer to lead the architecture, design, and fabrication of their first-generation chip, taking it from concept through silicon.
Responsibilities
• Lead the end-to-end ASIC design process, including architecture definition, RTL design, synthesis, verification, and bring-up
• Collaborate closely with digital hardware, embedded software, and AI research teams to co-optimize performance and power
• Drive EDA tool flows, simulation, and timing analysis through to physical implementation
• Manage external fabrication and foundry partners; oversee fabrication down to 20 nm or smaller
• Define and integrate key IP blocks for compute, interconnect, and memory subsystems
Skills
• Bachelor's or Master's degree in Electrical or Computer Engineering (PhD a plus)
• 5+ years of ASIC or SoC design experience in a professional setting
• Strong background in RTL design (Verilog/VHDL), synthesis, and timing closure
• Experience with EDA tools such as Synopsys, Cadence, or Mentor
• Understanding of low-power digital design, DFT, and physical design methodologies
• Experience working with advanced fabrication processes (20 nm or smaller)
• Background in AI accelerator architectures, DSP, or parallel compute systems
• Familiarity with high-speed interfaces (PCIe, DDR, AXI, etc.)
• Hands-on experience with post-silicon validation and debug
• Startup or small-team experience — comfortable building from the ground up
Benefits
• Competitive salary
• Benefits
• Early-stage equity potential
Company Overview
• The Company has invented and patented an innovative digital circuit design for a real-time AI/ML inference accelerator chip to be used in Predictive AI. It was founded in 2024, and is headquartered in , with a workforce of 11-50 employees. Its website is https://dd-aim.com/.
Apply Now
Apply Now
Responsibilities
• Lead the end-to-end ASIC design process, including architecture definition, RTL design, synthesis, verification, and bring-up
• Collaborate closely with digital hardware, embedded software, and AI research teams to co-optimize performance and power
• Drive EDA tool flows, simulation, and timing analysis through to physical implementation
• Manage external fabrication and foundry partners; oversee fabrication down to 20 nm or smaller
• Define and integrate key IP blocks for compute, interconnect, and memory subsystems
Skills
• Bachelor's or Master's degree in Electrical or Computer Engineering (PhD a plus)
• 5+ years of ASIC or SoC design experience in a professional setting
• Strong background in RTL design (Verilog/VHDL), synthesis, and timing closure
• Experience with EDA tools such as Synopsys, Cadence, or Mentor
• Understanding of low-power digital design, DFT, and physical design methodologies
• Experience working with advanced fabrication processes (20 nm or smaller)
• Background in AI accelerator architectures, DSP, or parallel compute systems
• Familiarity with high-speed interfaces (PCIe, DDR, AXI, etc.)
• Hands-on experience with post-silicon validation and debug
• Startup or small-team experience — comfortable building from the ground up
Benefits
• Competitive salary
• Benefits
• Early-stage equity potential
Company Overview
• The Company has invented and patented an innovative digital circuit design for a real-time AI/ML inference accelerator chip to be used in Predictive AI. It was founded in 2024, and is headquartered in , with a workforce of 11-50 employees. Its website is https://dd-aim.com/.
Apply Now
Apply Now