Head of Systems & Performance Verification @ Etched

About EtchedEtched is building the world’s first AI inference chip purpose-built for transformers, delivering over 10x the performance of NVIDIA GPUs. But that’s just the beginning. Our broader vision is to completely rethink the chip development lifecycle for a post-Moore world—enabling faster, more efficient custom silicon development than ever before. Backed by hundreds of millions from top investors, our team includes industry legends like Brian Loiler (who built products driving 80% of NVIDIA’s revenue), David Munday (who built Google’s TPU v1–v5 software and firmware stack), Mark Ross (former Cypress CTO), and Ajat Hukkoo (renowned Broadcom and Intel design exec). Etched is redefining the infrastructure layer for the fastest growing industry in history.About the RoleWe’re looking for a Head of Systems & Performance Verification to lead the front-end digital verification of one of the most complex AI SoCs ever built. You’ll manage a team focused on pre-silicon functional verification using UVM and other constrained-random methodologies, ensuring complete coverage of system-level interactions, performance features, and inter-chiplet behavior. This is a leadership role focused on building infrastructure, methodology, and execution to catch complex bugs at the RTL level—before they reach silicon. You’ll work cross-functionally with RTL, architecture, firmware, and silicon validation teams to ensure robust first-pass silicon.Key responsibilitiesLead the development and execution of the SoC-level design verification strategy, with a focus on high-performance AI architecturesBuild and manage a team of DV engineers responsible for UVM-based testbenches, stimulus generation, checkers, and coverage closureDevelop detailed test plans covering functional correctness, system-level scenarios, and performance-critical pathsPartner with RTL and architecture teams to review specs, identify corner cases, and define verification targetsDebug and root-cause complex failures across RTL, firmware, and runtime environmentsDrive the development of reusable, scalable verification infrastructure, including simulation, emulation, and hybrid environmentsTrack verification progress against coverage, bug discovery, and milestone criteriaEstablish and refine best…

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